1. Field of the Invention
The present invention relates to an electronic apparatus and the layout method thereof. More particularly, the present invention relates to an electronic apparatus for current source array and the layout method thereof.
2. Description of Related Art
Current digital-to-analog converter (referred to as DAC thereinafter) is generally composed of a plurality of current source units, and the higher the conversion bits thereof are, the more current source units are required. Accordingly, the layout of a DAC is usually very complex, especially the metal connection layout between the current source units are very complicated. Thus, conventionally DAC of lower conversion bits is usually laid out in an array arrangement. The corresponding current source units are arranged horizontally or vertically so as to simplify the layout thereof. However, when the number of current source units is increased, the spacing of some particular current source unit on the chip is increased, and the difference in device characteristics thereof is increased too, which may impair the linearity, which is, differential nonlinearity (DNL) and integral nonlinearity (INL), of the DAC.
FIG. 1 is a schematic block diagram of a conventional current digital-to-analog converter (DAC). An 8-bit DAC is shown in FIG. 1, which can output an analog current according to a digital signal. The binary converter 140 converts the digital signal into control signals SL01˜SL15 according to the values of the first 4 bits D0˜D3 and sends the control signals to the bit driver 150. The bit driver 150 produces current control signals SDL01˜SDL15, SDL01N˜SDL15N according to the control signals SL01˜SL15 for controlling the low bit current source unit 160 to output current. The low bit current source unit 160 includes 15 sets of current source units which respectively determine whether or not to output according to the control signals SDL01˜SDL15 and SDL01N˜SDL15N. The 15 sets of current source units in the low bit current source unit 160 can be generally referred to as low bit group.
The current output and conversion mechanism of the last 4 bits D4˜D7 of the digital signal is similar to that of the foregoing first 4 bits, and the main difference is that the high bit current source unit 130 includes 15 sets of high bit groups corresponding to the values of the last 4 bits D4˜D7. Wherein, each high bit group has 16 current source units. Thus, the output current of the high bit current source unit 130 can be up to 16 times of the current output of the low bit current source unit 160. In other words, the high bit current source unit 130 has 240 current source units. Thus, the layout thereof is very complex and the layout area is very large, accordingly the linearity of the DAC may be reduced due to the affections of process variation and temperature distribution.
FIG. 2 is a circuit diagram of a conventional low bit current source unit. Referring to FIG. 1 as well for following descriptions, the low bit current source unit 160 may include 15 current source units 201˜215, and the current source units 201˜215 can be generally referred to as a low bit group. The current source units 201˜215 determine the paths of the current outputs thereof according to the current control signals SDL01˜SDL15 and SDL01N˜SDL15N. Thus, 15 groups of independent connection lines have to be disposed repeatedly for respectively controlling the outputs of the current source units 201˜215. The high bit current source unit 130 has 240 current source units, and every 16 current source units is considered a high bit group so that the high bit current source unit 130 has 15 high bit groups. The outputs of the 15 high bit groups correspond to the current control signals SDH01˜SDH15 and SDH01N˜SDH15N. The combined current outputs of the high bit current source unit 130 and the low bit current source unit 160 correspond to an 8-bit digital signal.
FIG. 3 is a diagram illustrating the layout of a conventional current source array for a current DAC. Referring to FIGS. 1, 2 and 3, the areas T1,16˜T16,16 are used for disposing the low bit group (including the current source units L1˜L15), the areas T1,1˜T16,1 are used for disposing the high bit group M1, the areas T1,2˜T16,2 are for disposing the high bit group M2, and so on. Accordingly there are totally 15 high bit groups M1˜M15. The low bit group (including the current source units L1˜L15) forms the low bit current source unit 160, and the high bit groups M1˜M15 form the high bit current source unit 130.
As shown in FIG. 3, the current source units included in the high bit groups M1˜M15 and the low bit group (including the current source units L1˜L15) are arranged vertically, and even though the complexity of such arrangement is reduced, the affections of process variation and temperature distribution to the circuit are not considered, so that such arrangement can only be applied to the layout of DAC circuit of lower bit.
FIG. 4 is a layout diagram of a conventional transistor (referring to U.S. Pat. No. 6,954,164 B2). The low bit group (including the current source units L1˜L15) in this layout method is distributed on the diagonals of the 4 quadrants of the chip, and the distance thereof is very far. Thus, the affection of process variation to the current produced by some particular current source unit in the low bit group (including the current source units L1˜L15) is great, so that the conversion linearity of the current source unit is impaired at low bit conversion and the layout thereof is complex.
FIG. 5 is a layout diagram of a conventional transistor array of a DAC (referring to U.S. Pat. No. 6,157,333). The distribution of devices of such layout is too dispersed even though the affections of process variation and temperature distribution to such layout are reduced. Thus, the layout method in FIG. 5 is more complicated. In particular, more complex layout or more metal lines are required for the layout of the connection lines, so that the difficulty in circuit layout is increased greatly.
As described above, even more complex layout method can be adopted in conventional technology to reduce the affections of process variation and temperature distribution to a DAC, the layout thereof is too complex.